Taiwan Semiconductor 101

Taiwan Semiconductor 101

Taiwan Semi manufactures chipsets for designers like Nvidia, Amazon, AMD, Broadcom and Qualcomm. It does so in its highly expensive and complex chip fabrication plants. These are called “fabs” for short.

TSM Technologies & Needed Definitions:

  • Fab means a factory.
  • Nanometer (NM) describes the chip manufacturing technology. Smaller NM is more advanced, as it uses smaller transistors. This means TSM can pack more transistors into a single chip, making those chips more energy efficient and cost-effective.
  • “Advanced Technology” revenue is revenue from 3-nanometer (N3), N5 & N7 technology. Anything under N7 is “advanced.”
    • These labels describe the actual manufacturing technology process.
  • Wafer refers to the raw materials (usually silicon) that are used to manufacture chips. Wafers are the “substrate” that integrated circuits (ICs) are built on top of. The transistors within these ICs guide and facilitate functions. Nvidia’s Blackwell chips are considered ICs.
  • Lithography is the process of using photomasks (chip blueprints) and light to print chip patterns onto wafers. A light-sensitive material is added to wafers, with light pushed through the masks to guide the chip's design. This closely guides how light and chemicals generate desired patterns and create specific use cases. Lithography is paramount to TSM’s production."
  • While traditional foundry services entail the actual testing and creation of a chip on a silicon wafer, packaging involves storing, integrating and prepping chip components with thermal protection, connectivity equipment and encapsulation (physical damage protection).
    • These categories (packaging, testing and mask-making) are part of TSM’s “Foundry 2.0” – or the firm’s updated overall foundry total addressable market (TAM).
  • Chip-on-wafer-on-substrate (CoWoS) is a packaging process that combines chips into a single unit. It allows things like GPUs, high-bandwidth memory (HBM) and custom chips to be vertically stacked and connected on a single substrate. This improves the compute speed and performance generated from these chips. TSM is a key partner for all HBM manufacturers. It doesn't actually build the memory layer of these memory chips, but does provide the infrastructure to layer on and package other needed components.
  • Substrates also help protect chip components and manage heat.
  • Vast processing needs from GenAI and Agentic AI require the vertical stacking CoWoS facilitates to ensure needed access to scalable data.
  • AI Accelerators, as the name indicates, accelerate high-performance compute (HPC) workloads in the realm of AI. GPUs are a type of AI accelerator, along with Application Specific Integrated Circuits (ASICs) (custom chips) and Google’s Tensor Processing Units (TPUs; for machine learning). TSM also includes high-bandwidth memory in this category. HBM facilitates ultra-low latency, high-bandwidth support for querying and data processing tasks as a wonderful complement to GPUs, for example.